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1 ? ha-2556 57mhz, wideband, four quadrant, voltage output analog multiplier the ha-2556 is a monolithic, high speed, four quadrant, analog multiplier constructed in the intersil dielectrically isolated high frequency proc ess. the voltage output simplifies many designs by el iminating the current-to-voltage conversion stage required for current output multipliers. the ha-2556 provides a 450v/s slew rate and maintains 52mhz and 57mhz bandwidths for the x and y channels respectively, making it an idea l part for use in video systems. the suitability for precision video applications is demonstrated further by the y-channel 0.1db gain flatness to 5.0mhz, 1.5% multiplication error, -50db feedthrough and differential inputs with 8a bias current. the ha-2556 also has low differential gain (0.1%) and phase (0.1) errors. the ha-2556 is well suited for agc circuits as well as mixer applications for sonar, radar, and medical imaging equipment. the ha-2556 is not limited to multiplication applications only; frequency dou bling, power detection, as well as many other configurations are possible. for mil-std-883 compliant product consult the ha-2556/883 datasheet. features ? high speed voltage output . . . . . . . . . . . . . . . . . 450v/s ? low multiplication error . . . . . . . . . . . . . . . . . . . . . . . 1.5% ? input bias currents . . . . . . . . . . . . . . . . . . . . . . . . . . .8a ? 5mhz feedthrough . . . . . . . . . . . . . . . . . . . . . . . . . -50db ? wide y-channel bandwidth . . . . . . . . . . . . . . . . . . 57mhz ? wide x-channel bandwidth . . . . . . . . . . . . . . . . . . 52mhz ?v y 0.1db gain flatness . . . . . . . . . . . . . . . . . . . . 5.0mhz ? pb-free available (rohs compliant) applications ? military avionics ? missile guidance systems ? medical imaging displays ? video mixers ? sonar agc processors ? radar signal conditioning ? voltage controlled amplifier ? vector generators functional block diagram ordering information part number part marking temp range (c) package pkg dwg. # ha9p2556-9 ha9p2556 -9 -40 to +85 16 ld soic m16.3 ha9p2556-9z (note) ha9p2556 -9z -40 to +85 16 ld soic (pb-free) m16.3 ha1-2556-9 ha1-2556-9 -40 to +85 16 ld cerdip f16.3 note: these intersil pb-free plasti c packaged products employ special pb-free material sets; molding compounds/die attach materials and 100% matte tin plate plus anneal - e3 te rmination finish, which is rohs compliant and compatible with both snpb and pb-free soldering operations. intersil pb-free products ar e msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. ha-2556 1/sf x y v out z v x + v x - v y + v y - v z + v z - + - a + - + - + - note: the transfer equation for the ha-2556 is: (v x+ -v x- ) (v y+ -v y- ) = s f (v z+ -v z- ), where sf = scale factor = 5v; v x, v y, v z = differential inputs. caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 1998, 2008. all rights reserved all other trademarks mentioned are the property of their respective owners. fn2477.6 data sheet april 29, 2008
2 fn2477.6 april 29, 2008 pinout ha-2556 (16 ld cerdip, soic) top view 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 gnd v ref v yio b v yio a v y + v y - v out v- v xio a nc v x + v x - v+ v z - v z + v xio b + - ref y x z ha-2556
3 fn2477.6 april 29, 2008 absolute maximum rati ngs thermal information voltage between v+ and v- terminals. . . . . . . . . . . . . . . . . . . . 35v differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6v output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60ma operating conditions temperature range . . . . . . . . . . . . . . . . . . . . . . . . . -40c to +85c thermal resistance (typical, note 1) ja (c/w) jc (c/w) 16 ld soic package . . . . . . . . . . . . . . 90 n/a 16 ld cerdip package. . . . . . . . . . . . 75 20 maximum junction temperature (ceramic package) . . . . . . . +175c maximum junction temperature (plast ic packages) . . . . . +150c maximum storage temperature range . . . . . . . . . -65c to +150c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/pb-freereflow.asp caution: do not operate at or near the maximum ratings listed fo r extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. note: 1. ja is measured with the component mounted on a low effective therma l conductivity test board in free air. see tech brief tb379 fo r details. electrical specifications v supply = 15v, r f = 50 , r l = 1k , c l = 20pf, unless otherwise specified. parameter test conditions temp ( c) min (note 10) typ max (note 10) units multiplier performance transfer function multiplication error (note 2) 25 - 1.5 3 % full - 3.0 6 % multiplication error drift full - 0.003 - %/c scale factor 25 - 5 - v linearity error v x , v y = 3v, full scale = 3v 25 - 0.02 - % v x , v y = 4v, full scale = 4v 25 - 0.05 0.25 % v x , v y = 5v, full scale = 5v 25 - 0.2 0.5 % ac characteristics small signal bandwidth (-3db) v y = 200mv p-p , v x = 5v 25 - 57 - mhz v x = 200mv p-p , v y = 5v 25 - 52 - mhz full power bandwidth (-3db) 10v p-p 25 - 32 - mhz slew rate (note 5) 25 420 450 - v/s rise time (note 6) 25 - 8 - ns overshoot (note 6) 25 - 20 - % settling time to 0.1%, (note 5) 25 - 100 - ns differential gain (note 3) 25 - 0.1 0.2 % differential phase (note 3) 25 - 0.1 0.3 v y 0.1db gain flatness 200mv p-p , v x = 5v, 25 4.0 5.0 - mhz v x 0.1db gain flatness 200mv p-p , v y = 5v, 25 2.0 4.0 - mhz thd + n (note 4) 25 - 0.03 - % 1mhz feedthrough 200mv p-p , other channel nulled 25 - -65 - db 5mhz feedthrough 200mv p-p , other channel nulled 25 - -50 - db signal input (v x , v y , v z) input offset voltage 25 - 3 15 mv full - 8 25 mv average offset voltage drift full - 45 - v/c input bias current 25 - 8 15 a full - 12 20 a v out a v x+ v x- ? () v y+ v y- ? () 5 -------------------------------------------------------------------- v z+ v z- ? () ? = ha-2556
4 fn2477.6 april 29, 2008 input offset current 25 - 0.5 2 a full - 1.0 3 a differential input resistance 25 - 1 - m full scale differential input (v x , v y , v z )255--v v x common mode range 25 - 10 - v v y common mode range 25 - +9, -10 - v cmrr within common mode range full 65 78 - db voltage noise (note 8) f = 1khz 25 - 150 - nv/ hz f = 100khz 25 - 40 - nv/ hz output characteristics output voltage swing (note 9) full 5.0 6.05 - v output current full 20 45 - ma output resistance 25 - 0.7 1.0 power supply +psrr (note 7) full 65 80 - db -psrr (note 7) full 45 55 - db supply current full - 18 22 ma notes: 2. error is percent of full scale, 1% = 50mv. 3. f = 4.43mhz, v y = 300mv p-p , 0v dc to 1v dc offset, v x = 5v. 4. f = 10khz, v y = 1v rms , v x = 5v. 5. v out = 0v to 4v. 6. v out = 0mv to 100mv. 7. v s = 12v to 15v. 8. v x = v y = 0v. 9. v x = 5.5v, v y = 5.5v. 10. parameters with min and/or max limits are 100% tested at +25 c, unless otherwise specified. te mperature limits established b y characterization and are not production tested. electrical specifications v supply = 15v, r f = 50 , r l = 1k , c l = 20pf, unless otherwise specified. (continued) parameter test conditions temp ( c) min (note 10) typ max (note 10) units ha-2556
5 fn2477.6 april 29, 2008 simplified schematic application information operation at reduced supply voltages the ha-2556 will operate over a range of supply voltages, 5v to 15v. use of supply voltages below 12v will reduce input and output voltage ranges. see ?typical performance curves? on page 12 for more information. offset adjustment x-channel and y-channel offset voltages may be nulled by using a 20k potentiometer between the v yio or v xio adjust pin a and b and connecting the wiper to v-. reducing the channel offset voltage, will reduce ac feedthrough and improve the multiplication error. output offset voltage can also be nulled by connecting v z - to the wiper of a potentiometer which is tied between v+ and v-. capacitive drive capability when driving capacitive loads >20pf a 50 resistor should be connected between v out and v z +, using v z + as the output (see figure 1). this will prevent the multiplier from going unstable and reduce gain peaking at high frequencies. the 50 resistor will dampen the resonance formed with the capacitive load and the inductance of the output at pin 8. gain accuracy will be maintained because the resistor is inside the feedback loop. theory of operation the ha-2556 creates an output voltage that is the product of the x and y input voltages divided by a constant scale factor of 5v. the resulting output has the correct polarity in each of the four quadrants defined by the combinations of positive and negative x and y inputs. the z stage provides the means for negative feedback (in the multiplier configuration) and an input for summation into the output. this results in equation 1, where x, y and z are high impedance differential inputs . to accomplish this the differential input voltages are first converted into differential currents by the x and y input transconductance stages. the curr ents are then scaled by a constant reference and combined in the multiplier core. the multiplier core is a basic g ilbert cell that produces a differential output current proport ional to the product of x and y input signal currents. this current becomes the output for the ha-2557. the ha-2556 takes the output current of the core and feeds it to a transimpedance amplifier, that converts the current to a voltage. in the multiplier configuration, negative feedback is provided with the z transconduct ance amplifier by connecting v out to the z input. the z stage converts v out to a current which is subtracted from the multiplier core before being applied to the high gain transimpedance amp. the z stage, by virtue of it?s similarity to the x and y stages, also cancels v bias out v z - v cc v z + v- v+ v yio a v yio b v y - v y + v xio av xio b v x + ref gnd v x - + - v bias nc nc v y + -15v v out +15v v x + nc nc 50 1k 20pf nc nc v z - v z + 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 + - ref + - + - + - figure 1. driving capacitive load v out = z x x y 5 ------------- - = (eq. 1) ha-2556
6 fn2477.6 april 29, 2008 second order errors introduced by the dependence of v be on collector current in the x and y stages. the purpose of the reference circuit is to provide a stable current, used in setting the scale factor to 5v. this is achieved with a bandgap reference circuit to produce a temperature stable voltage of 1. 2v which is forced across a nicr resistor. slight adjustments to scale factor may be possible by overriding the internal reference with the v ref pin. the scale factor is used to maintain the output of the multiplier within the normal operating range of 5v when full scale inputs are applied. the balance concept the open loop transfer for the ha-2556 is calculated using equation 2: where; a = output amplifier open loop gain v x, v y, v z = differential input voltages 5v = fixed scaled factor an understanding of the transfer function can be gained by assuming that the open loop gain, a, of the output amplifier is infinite. with this a ssumption, any value of v out can be generated with an infinitesimally small value for the terms within the brackets. therefore we can write equation 3: which simplifies to equation 4: this form of the transfer equation provides a useful tool to analyze multiplier application circuits and will be called the balance concept. typical applications let?s first examine the balance concept as it applies to the standard multiplier configuration (figure 2). signals a and b are input to the multiplier and the signal w is the result. by substituting the signal values into the balance equation yields equation 5: and solving for w yields equation 6: notice that the output (w) enters the equation in the feedback to the z stage. the balance equation does not test for stability, so remember t hat you must provide negative feedback. in the multiplier configuration, the feedback path is connected to v z + input, not v z -. this is due to the inversion that takes place at the summing node just prior to the output amplifier. feedback is not restricted to the z stage, other feedback paths are possible as in the divider configuration shown in figure 3. inserting the signal values a, b and w into the balance equation for the divider conf iguration yields equation 7: solving for w yields equation 8: notice that, in the divider configuration, signal b must remain 0 (positive) for the feedback to be negative. if signal b is negative, then it will be multiplied by the v x- input to produce positive feedback and the output will swing into the rail. signals may be applied to more than one input at a time as in the squaring configuration in figure 4: here the balance equation will appear as equation 9: v out = a v x+ -v x- () x v y+ v ? y- () 5v ------------------------------------------------------------------ - - v z+ -v z- () (eq. 2) 0 = v x+ -v x- () x v y+ -v y- () 5v ---------------------------------------------------------------- - - v z+ -v z- () (eq. 3) v x+ -v x- () x v y+ -v y- () = 5v v z+ -v z- () (eq. 4) ha-2556 1/5v x y v out z v x + v x - v y + v y - v z + v z - w a b + - + - a + - + - figure 2. multiplier (a) x (b) = 5(w) (eq. 5) w = a x b 5 ------------- - (eq. 6) ha-2556 1/5v x y v out z v x + v x - v y + v y - v z + v z - w a b + - + - + - a + - figure 3. divider -w () b () 5v x -a () = (eq. 7) w = 5a b ------ - (eq. 8) (a) x (a) 5(w) = (eq. 9) ha-2556
7 fn2477.6 april 29, 2008 which simplifies to equation 10: the last basic configuration is the square root as shown in figure 5. here feedback is provided to both x and y inputs. the balance equation takes the form of equation 11: which equates to equation 12: the four basic configurations (multiply, divide, square and square root) as well as variat ions of these basic circuits have many uses. frequency doubler for example, if acos( ? ) is substituted for signal a in the square function, then it becomes a frequency doubler and the equation takes the form of equation 13: and using some trigonometric identities gives the result in equation 14: square root the square root function can serve as a precision/wide bandwidth compander for audio or video applications. a compander improves the signal-to-noise ratio for your system by amplifying low level signals while attenuating or compressing large signals (refer to figure 17; x 0.5 curve). this provides for better low level signal immunity to noise during transmission. on the receiving end, the original signal may be reconstructed with t he standard square function. communications the multiplier configuration has applications in am signal generation, synchronous am detection and phase detection to mention a few. these circuit configurations are shown in figures 6, 7 and 8. the ha-2556 is particularly useful in applications that require high speed signals on all inputs. ha-2556 1/5v x y v out z v x + v x - v y + v y - v z + v z - w a a + - + - + - + - figure 4. square w a 2 5 ------ - = (eq. 10) ha-2556 1/5v x y v out z v x + v x - v y + v y - v z + v z - w a + - + - a + - + - figure 5. square root (for a > 0) w () w ? () 5a ? () = (eq. 11) w5a = (eq. 12) acos ? () () acos ? () () 5w () = (eq. 13) w a 2 10 ------ - 1cos2 ? () + () = (eq. 14) ha-2556 1/5v x y v out z v x + v x - v y + v y - v z + v z - w acos( ) ccos( c ) carrier audio w ac 10 -------- cos c a ? () cos c a + () + () = + - + - a + - + - figure 6. am signal generation ha-2556 1/5v x y v out z v x + v x - v y + v y - v z + v z - w am signal carrier like the frequency doubler you get audio centered at dc + - + - a + - + - figure 7. synchronous am detection and 2f c . ha-2556 1/5v x y v out z v x + v x - v y + v y - v z + v z - w acos( ? ) acos( ?+ ) w a 2 10 ------ - cos () cos 2 ? + () + () = dc component is proportional to cos(f) + - + - a + - + - figure 8. phase detection ha-2556
8 fn2477.6 april 29, 2008 each input x, y and z have similar wide bandwidth and input characteristics. this is unl ike earlier products where one input was dedicated to a slow moving control function as is required for automatic gain control. the ha-2556 is versatile enough for both. although the x and y inputs have similar ac characteristics, they are not the same. the des igner should consider input parameters such as small signal bandwidth, ac feedthrough and 0.1db gain flatness to get the most performance from the ha-2556. the y-channel is the faster of the two inputs with a small signal bandwidth of typically 57mhz vs 52mhz for the x-channel. therefore in am signal generation, the best performance will be obtained with the carrier applied to the y-channel and the modulation signal (lower frequency) applied to the x-channel. scale factor control the ha-2556 is able to operate over a wide supply voltage range 5v to 17.5v. the 5v range is particularly useful in video applications. at 5v the input voltage range is reduced to 1.4v. the output cannot reach its full scale value with this restricted input, so it may become necessary to modify the scale factor. adjusting th e scale factor may also be useful when the input signal it self is restricted to a small portion of the full scale level. here, we can make use of the high gain output amplifier by adding external gain resistors. generating the maximum output possible for a given input signal will improve the signal-to-noise ratio and dynamic range of the system. for exampl e, let?s assume that the input signals are 1v peak each then, the maximum output for the ha-2556 will be 200mv. (1v x 1v)/(5v) = 200mv. it would be nice to have the output at the same full scale as our input, so let?s add a gain of 5 as shown in figure 9. one caveat is that the output bandwidth will also drop by this factor of 5. the multipli er equation then becomes equation 15: current output another useful circuit for low vo ltage applications allows the user to convert the voltage out put of the ha2556 to an output current. the ha-2557 is a current output version offering 100mhz of bandwidth, but its scale factor is fixed and does not have an output amplifier for additional scaling. fortunately, the circuit in figure 10 provides an output current that can be scaled with the value of r convert and provides an output impedance of typically 1m . i out then becomes equation 16: video fader the video fader circuit provides a unique function. here channel b is applied to the minus z input in addition to the minus y input. in this way, th e function in figure 11 is generated. v mix will control the percentage of channel a and channel b that are mixed together to produce a resulting video image or other signal. the balance equation looks like equation 17: which simplifies to equation 18: when v mix is 0v the equation becomes v out = chb and cha is removed, conversely when v mix is 5v the equation becomes v out = cha eliminating chb. for v mix values 0v v mix 5v the output is a blend of cha and chb. other applications as previously shown, a function may contain several different operators at the same time and use only one ha-2556 1/5v x y v out z v x + v x - v y + v y - v z + v z - w a b 1k 250 r f r g externalgain r f r g -------- 1 + = + - + - a + - + - figure 9. external gain of 5 w 5ab 5 ----------- - ab == (eq. 15) i out ab 5 ------------- - 1 r convert -------------------------------- = (eq. 16) ha-2556 1/5v x y v out z v x + v x - v y + v y - v z + v z - i out a b r convert + - + - a + - + - figure 10. current output v mix () cha chb ? () 5v out chb ? () = (eq. 17) v out chb v mix 5 ------------- - cha chb ? () + = (eq. 18) nc nc v y + -15v v out +15v v x + nc nc 50 nc nc v z - v z + cha chb v y - v mix (0v to 5v) 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 + - ref + - + - + - figure 11. video fader ha-2556
9 fn2477.6 april 29, 2008 ha-2556. some other possible multi-operator functions are shown in figures 12, 13 and 14. of course the ha-2556 is also well suited to standard multiplier applications such as automatic gain control and voltage controlled amplifier. automatic gain control figure 15 shows the ha-2556 configured in an automatic gain control or agc application. the ha-5127 low noise amplifier provides the gain control signal to the x input. this control signal sets the peak output voltage of the multiplier to match the preset reference level. the feedback network around the ha-5127 provides a response time adjustment. high frequency changes in the peak are rejected as noise or the desired signal to be transmitted. these signals do not indicate a change in the average peak value and therefore no gain adjustment is needed. lower frequency changes in the peak value are given a gain of -1 for feedback to the control input. at dc the circuit is an integrator automatically compensating for offset and other constant error terms. this multiplier has the advantage over other agc circuits, in that the signal bandwidth is not affected by the control signal gain adjustment. voltage controlled amplifier a wide range of gain adjustment is available with the voltage controlled amplifier configuration shown in figure 16. here the gain of the hfa0002 can be swept from 20v/v to a gain of almost 1000v/v with a dc voltage from 0v to 5v. wave shaping circuits wave shaping or curve fitting is another class of application for the analog multiplier. for example, where a nonlinear sensor requires corrective curv e fitting to improve linearity the ha-2556 can provide nonintegr al powers in the range of 1 to 2 or nonintegral roots in the range of 0.5 to 1.0 (refer to ?references? on page 11). this effect is displayed in figure 17. figure 13. percentage deviation figure 14. difference divided by sum s (for a + b 0v) ha-2556 1/5v x y z v x + v x - v y + v y - v z + v z - w = 5(a 2 -b 2 ) a b 5k 5k 5k 5k + - + - a + - + - figure 12. difference of squares ha-2556 1/5v x y v out z v x + v x - v y + v y - v z + v z - w = 100 b a a - b a 95k 5k r 2 r 1 r 1 and r 2 set scale to 1v/%, other scale factors possible. for a 0v. + - + - a + - + - ha-2556 1/5v x y v out z v x + v x - v y + v y - v z + v z - w = 10 b a a - b b + a 5k 5k + - + - a + - + - figure 15. automatic gain control nc nc v y + v- v out v+ nc nc 50 ha-2556 5k 10k ha-5127 0.01 f 10k 0.1 f 1n914 5.6v 0.1 f +15v 20k nc nc + - 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 + - ref y x z ha-2556
10 fn2477.6 april 29, 2008 . . a multiplier can?t do nonintegra l roots ?exactly?, but it can yield a close approximation. we can approximate nonintegral roots with equations 19 and 20 of the form: figure 18 compares the function v out = v in 0.7 to the approximation v out = 0.5v in 0.5 + 0.5v in . this function can be easily built using an ha-2556 and a potentiometer for easy adjustment as shown in figures 19 and 20. if a fixed nonintegral power is desired, the circuit shown in figure 21 eliminates the need fo r the output buffer amp. these circuits approximate the function v in m where m is the desired nonintegral power or root. nc nc v x + (v gain ) v- v in v+ nc nc hfa0002 5k v out 500 nc nc ha-2556 + - 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 + - ref y x z figure 16. voltage controlled amplifier 0 0.2 0.4 0.6 0.8 1.0 0 0.2 0.4 0.6 0.8 1.0 input (v) output (v) figure 17. effect of no nintegral powers/roots x 0.7 x 0.5 x 1.5 x 2 v o 1 ? () v in 2 v in + = (eq. 19) v o 1 ? () v in 1/2 v in + = (eq. 20) figure 19. nonintegral roots - adjustable 0 0.2 0.4 0.6 0.8 1.0 0 0.2 0.4 0.6 0.8 1.0 input (v) output (v) figure 18. compare approximation to nonintegral root x 0.7 0.5x 0.5 + 0.5x x nc nc v- v in v+ nc nc ha-2556 ha-5127 nc nc v out 0v v in 1v 0.5 m 1.0 1- + - 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 + - ref y x z + - + - + - ha-2556
11 fn2477.6 april 29, 2008 setting: values for to give a desired m root or power are as follows: sine function generators similar functions can be form ulated to approximate a sine function converter as shown in figure 22. with a linearly changing (0v to 5v) input the output will follow 0 to 90 of a sine function (0v to 5v) output. this configuration is theoretically capable of 2.1% maximum error to full scale. by adding a second ha-2556 to the circuit an improved fit may be achieved with a theoretical maximum error of 0.5% as shown in figure 23. figure 23 has the added benefit that it will work for positive and negative input signals. this makes a convenient triangle (5v input) to sine wave (5v output) converter. references [1] pacifico cofrancesco, ?rf mixers and modulators made with a monolithic four-quadr ant multiplier? microwave journal, december 1991 pg. 58 - 70. [2] richard goller, ?ic generates nonintegral roots? electronic design, december 3, 1992. for; 0v v in 5v max theoretical error = 2.1%fs where: for; -5v v in 5v max theoretical error = 0.5%fs figure 20. nonintegral powers - adjustable figure 21. nonintegral powers - fixed roots - figure 19 powers - figure 20 m m 0.5 0 1.0 1 0.6 0.25 1.2 0.75 0.7 0.50 1.4 0.50 0.8 0.70 1.6 0.30 0.9 0.85 1.8 0.15 1.0 1 2.0 0 nc nc v- v in v+ nc nc ha-2556 ha-5127 nc nc v out 0v v in 1v 1.0 m 2.0 1- + - 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 + - ref y x z + - + - + - nc nc v- v in v+ nc nc ha-2556 nc nc v out 0v v in 1v 1.2 m 2.0 r 3 r 4 r 1 r 2 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 + - ref y x z + - + - + - v out 1 5 -- - r 3 r 4 ------ - 1 + ?? ?? ?? v in 2 r 3 r 4 ------ - 1 + ?? ?? ?? r 2 r 1 r 2 + -------------------- - ?? ?? ?? v in + = (eq. 21) 1 ? 1 5 -- - r 3 r 4 ------ - 1 + ?? ?? ?? = r 3 r 4 ------ - 1 + ?? ?? ?? r 2 r 1 r 2 + -------------------- - ?? ?? ?? = (eq. 22) nc nc v- v in v+ nc nc ha-2556 nc nc v out r 3 , 644 r 4 , 1k r 2 r 1 r 6 r 5 262 470 470 1410 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 + - ref y x z + - + - + - figure 22. sine-function generator v out v in 1 0.1284v in ? () 0.6082 0.05v in ? () -------------------------------------------------- - = 5sin 2 -- - v in 5 --------- ? ?? ?? (eq. 23) 0.6082 r 4 r 3 r 4 + -------------------- - = 5 0.1284 () r 2 r 1 r 2 + -------------------- - = 50.05 () r 6 r 5 r 6 + -------------------- - = ; (eq. 24) v out 5v in 0.05494v in 3 ? 3.18167 0.0177919v in 2 + ------------------------------------------------------------------ - 5sin 2 -- - v in 5 --------- ? ?? ?? = (eq. 25) ha-2556
12 fn2477.6 april 29, 2008 10k x + x - y + y - x + x - y + y - v out z + z - v out z + z - v in v out ha-2556 ha-2556 23.1k 71.5k 5.71k 10k figure 23. bipolar sine-function generator typical performance curves figure 24. x-channel multiplier erro r figure 25. x-channel multiplier error figure 26. y-channel multiplier erro r figure 27. y-channel multiplier error -6 -4 -2 0 2 4 6 -1 -0.5 0 0.5 1.0 x input (v) error (%fs) y = 3 y = 2 y = 5 y = 4 y = 0 y = 1 -6-4-20246 -1.5 -1.0 -0.5 0 0.5 1.0 1.5 x input (v) error (%fs) y = -5 y = -3 y = -4 y = -2 y = -1 y = 0 -6 -4 -2 0 2 4 6 -1.0 -0.5 0 0.5 1.0 1.5 y input (v) error (%fs) x = -3 x = -4 x = -1 x = 0 x = -5 x = -2 -6-4-20246 -1.5 -1.0 -0.5 0 0.5 1.0 y input (v) error (%fs) x = 0 x = 5 x = 1 x = 2 x = 4 x = 3 ha-2556
13 fn2477.6 april 29, 2008 figure 28. large signal response f igure 29. small signal response figure 30. y-channel full power bandwidth figure 31. y-channel full power bandwidth figure 32. x-channel full power bandwidth figure 33. x-channel full power bandwidth typical performance curves (continued) 8 4 0 -4 -8 v x = 4v pulse v y = 5v dc output (v) 0ns 500ns 1s 2v/div; 100ns/div 0 output (mv) v y = 100mv pulse v x = 5v dc 0ns 250ns 500ns 200 100 -100 -200 50mv/div; 50ns/div 2 0 -2 gain (db) -1 -3 3 4 1 -4 1m 10m 100k 10k y-channel = 10v p-p x-channel = 5v dc frequency (hz) -3db at 32.5mhz 1m 10m 100k 10k frequency (hz) 2 0 -2 gain (db) -1 -3 3 4 1 -4 y-channel = 4v p-p x-channel = 5v dc 1m 10m 100k 10k frequency (hz) 2 0 -2 gain (db) -1 -3 3 4 1 -4 x-channel = 10v p-p y-channel = 5v dc x-channel = 4v p-p y-channel = 5v dc 2 0 -2 gain (db) -1 -3 3 4 1 -4 1m 10m 100k 10k frequency (hz) ha-2556
14 fn2477.6 april 29, 2008 figure 34. y-channel bandwidth vs x-channel figure 35. x-channel bandwidth vs y-channel figure 36. y-channel cmrr vs frequency figure 37. x-channel cmrr vs frequency figure 38. feedthrough vs frequency figure 39. feedthrough vs frequency typical performance curves (continued) 10m 100m 1m frequency (hz) 10k 100k 0 -12 gain (db) -6 -18 -24 v x = 0.5v dc v x = 2v dc v x = 5v dc v y = 200mv p-p 0 -12 gain (db) -6 -18 -24 10m 100m 1m frequency (hz) 10k 100k v x = 200mv p-p v y = 0.5v dc v y = 2v dc v y = 5v dc 1m 100m 100k 10k frequency (hz) -30 -50 -70 cmrr (db) -60 -80 -20 -10 -40 10m v y +, v y - = 200mv rms 5mhz -38.8db 0 v x = 5v dc 5mhz -26.2db -30 -50 -70 cmrr (db) -60 -80 -20 -10 -40 0 1m 100m 100k 10k frequency (hz) 10m v x +, v x - = 200mv rms v y = 5v dc 1m 100m 100k 10k frequency (hz) 10m -52.6db at 5mhz -30 -50 -70 feedthrough (db) -60 -80 -20 -10 -40 0 v x = 200mv p-p v y = nulled v y = 200mv p-p -49db at 5mhz -30 -50 -70 feedthrough (db) -60 -80 -20 -10 -40 0 1m 100m 100k 10k frequency (hz) 10m v x = nulled ha-2556
15 fn2477.6 april 29, 2008 figure 40. offset voltage vs temperature figure 41. input bias current (v x , v y , v z ) vs temperature figure 42. scale factor error vs temperature figure 43. input voltage range vs supply voltage figure 44. input common mode range vs supply voltage figure 45. supply current vs supply voltage typical performance curves (continued) -100 -50 0 50 100 150 0 1 2 3 4 5 6 7 8 temperature (c) offset voltage (mv) |v io z| |v io x| |v io y| -100 -50 0 50 100 150 4 5 6 7 8 9 10 11 12 13 14 temperature (c) bias current (a) -100 -50 0 50 100 150 -1 -0.5 0 0.5 1.0 1.5 2.0 temperature (c) scale factor error (%) 4 6 8 10121416 1 2 3 4 5 6 supply voltage ( v) input voltage range (v) x input y input 4 6 8 10121416 -15 -10 -5 0 5 10 15 supply voltage ( v) cmr (v) x and y input x input y input 0 5 10 15 20 0 5 10 15 20 25 supply voltage ( v) supply current (ma) i ee i cc ha-2556
16 fn2477.6 april 29, 2008 die characteristics die dimensions: 71 mils x 100 mils x 19 mils metallization: type: al, 1% cu thickness: 16k ? 2k ? passivation: type: nitride (si 3 n 4 ) over silox (sio 2 , 5% phos) silox thickness: 12k ? 2k ? nitride thickness: 3.5k ? 2k ? transistor count: 84 substrate potential: v- metallization mask layout ha-2556 figure 46. output voltage vs r load typical performance curves (continued) 100 300 500 700 900 1100 4.2 4.4 4.6 4.8 5.0 r load ( ) max output voltage (v) gnd (1) vref (2) v yio b (3) v yio a (4) v y + (5) v y - (6) (7) v- (8) v out (9) v z + (10) v z - v+ (11) v x - (12) v x + (13) v xio b (15) v xio a (16) ha-2556
17 fn2477.6 april 29, 2008 ha-2556 small outline plast ic packages (soic) notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e? does not include inte rlead flash or protrusions. interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. the lead width ?b?, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. controlling dimension: millimeter. converted inch dimensions are not necessarily exact. index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) h x 45 c h 0.25(0.010) b m m m16.3 (jedec ms-013-aa issue c) 16 lead wide body small outline plastic package symbol inches millimeters notes min max min max a 0.0926 0.1043 2.35 2.65 - a1 0.0040 0.0118 0.10 0.30 - b 0.013 0.0200 0.33 0.51 9 c 0.0091 0.0125 0.23 0.32 - d 0.3977 0.4133 10.10 10.50 3 e 0.2914 0.2992 7.40 7.60 4 e 0.050 bsc 1.27 bsc - h 0.394 0.419 10.00 10.65 - h 0.010 0.029 0.25 0.75 5 l 0.016 0.050 0.40 1.27 6 n16 167 0 8 0 8 - rev. 1 6/05
18 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn2477.6 april 29, 2008 ha-2556 ceramic dual-in-line fr it seal packages (cerdip) notes: 1. index area: a notch or a pin one identification mark shall be locat- ed adjacent to pin one and shall be located within the shaded area shown. the manufacturer?s identification shall not be used as a pin one identification mark. 2. the maximum limits of lead di mensions b and c or m shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 3. dimensions b1 and c1 apply to lead base metal only. dimension m applies to lead plating and finish thickness. 4. corner leads (1, n, n/2, and n/2+1) may be configured with a partial lead paddle. for this co nfiguration dimension b3 replaces dimension b2. 5. this dimension allows for off- center lid, meniscus, and glass overrun. 6. dimension q shall be measured from the seating plane to the base plane. 7. measure dimension s1 at all four corners. 8. n is the maximum number of terminal positions. 9. dimensioning and tolerancing per ansi y14.5m - 1982. 10. controlling dimension: inch. bbb c a - b s c q l a seating base d plane plane -d- -a- -c- -b- d e s1 b2 b a e m c1 b1 (c) (b) section a-a base lead finish metal e a/2 a m s s ccc c a - b m d s s aaa ca - b m d s s e a f16.3 mil-std-1835 gdip1-t16 (d-2, configuration a) 16 lead ceramic dual-in-line frit seal package symbol inches millimeters notes min max min max a - 0.200 - 5.08 - b 0.014 0.026 0.36 0.66 2 b1 0.014 0.023 0.36 0.58 3 b2 0.045 0.065 1.14 1.65 - b3 0.023 0.045 0.58 1.14 4 c 0.008 0.018 0.20 0.46 2 c1 0.008 0.015 0.20 0.38 3 d - 0.840 - 21.34 5 e 0.220 0.310 5.59 7.87 5 e 0.100 bsc 2.54 bsc - ea 0.300 bsc 7.62 bsc - ea/2 0.150 bsc 3.81 bsc - l 0.125 0.200 3.18 5.08 - q 0.015 0.060 0.38 1.52 6 s1 0.005 - 0.13 - 7 90 o 105 o 90 o 105 o - aaa - 0.015 - 0.38 - bbb - 0.030 - 0.76 - ccc - 0.010 - 0.25 - m - 0.0015 - 0.038 2, 3 n16 168 rev. 0 4/94

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